PCB Common Ways Of Impedance Matching

What matters is not the frequency, but the steepness of the edge of the signal, that is, the rise/fall time of the signal. It is generally believed that if the rise/fall time of the signal (calculated by 10% ~ 90%) is less than 6 times the wire delay, it is a high-speed signal, and attention must be paid to impedance matching.The wire delay is usually 150ps/inch.

The characteristic impedance

As the signal travels along a transmission line, the signal always sees exactly the same instantaneous impedance as it travels if the signal travels at the same speed throughout the line and the capacitance per unit length is the same.Since the impedance remains constant throughout the transmission line, we give a specific name to the characteristic or characteristic of a particular transmission line, called the characteristic impedance of the transmission line.Characteristic impedance refers to the value of the instantaneous impedance seen by the signal as it travels along a transmission line.Characteristic impedance is related to PCB conductor layer, PCB material (dielectric constant), wire width, distance between wire and plane and other factors, and has nothing to do with wire length.The characteristic impedance can be calculated using software.In high-speed PCB wiring, the routing impedance of digital signal is generally designed as 50 ohms, which is an approximate number.Coaxial cable is generally defined as 50 ohms base band, 75 ohms frequency band and 100 ohms stranded (differential).

Common ways of impedance matching

1. Serial terminal matching

Under the condition that the impedance at the signal source end is lower than the characteristic impedance of the transmission line, a resistance R is connected between the signal source end and the transmission line in series to make the output impedance of the source end match the characteristic impedance of the transmission line and prevent the signal reflected back from the load end from reflecting again.

Matching resistance selection principle: the sum of matching resistance and the output impedance of the driver is equal to the characteristic impedance of the transmission line.For common CMOS and TTL drivers, the output impedance varies with the level of the signal.Therefore, for TTL or CMOS circuits, it is not possible to have a very correct matching resistance, so you have to compromise.Chain-topology signal networks are not suitable for serial terminal matching. All loads must be connected to the end of the transmission line.

Serial matching is the most common terminal matching method.It has the advantage of low power consumption, no additional DC load on the driver, no additional impedance between the signal and the ground, and only one resistance element is required.Common applications: common CMOS, TTL circuit impedance matching.USB signals are also sampled this way for impedance matching.

2. Parallel terminal matching

When the impedance at the signal source is very small, the input impedance at the load end is matched with the characteristic impedance of the transmission line by adding a parallel resistor to eliminate the reflection at the load end.The realization forms can be divided into single resistance and double resistance.

Matching resistance selection principle: when the input impedance of the chip is very high, for the single resistance form, the joint resistance value of the load must be close to or equal to the characteristic impedance of the transmission line;For double resistance forms, each shunt resistance is twice the characteristic impedance of the transmission line.

The advantages of parallel terminal matching are simple and easy, but the obvious disadvantages are that it will bring DC power consumption: dc power consumption of single resistance mode is closely related to the duty ratio of signal;The dual resistance mode has DC power consumption no matter the signal is high level or low level, but the current is half less than the single resistance mode.

Common application: high speed signal is widely used.

(1) DDR, DDR2 and other SSTL drives.Single resistance, in parallel to VTT (generally half of IOVDD).The parallel matching resistance of DDR2 data signal is embedded in the chip.

(2) HIGH-SPEED serial data interfaces such as TMDS.In the form of single resistance, the receiver is connected in parallel to IOVDD with a single-end impedance of 50 ohms (100 ohms between differential pairs).